Modelling duffing oscillator in Verilog...

  • Thread starter Javed Akhter Mondal
  • Start date
J

Javed Akhter Mondal

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Can anyone help me with modelling the simple duffing oscillator in Verilog? I am kinda new to HDL and I need it ASAP.
 
On Friday, November 25, 2022 at 4:42:01 AM UTC-8, akhte...@gmail.com wrote:
> Can anyone help me with modelling the simple duffing oscillator in Verilog? I am kinda new to HDL and I need it ASAP.
can you implement the behavior you want in c/c++?
 

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